Director of Inter-university Semiconductor
Bio: Dr. Hyuk-Jae Lee received the B.S. and
M.S. degrees in Electronics Engineering from Seoul
National University (SNU), Seoul, South Korea, in
1987 and 1989, respectively, and the Ph.D. degree in
electrical and computer engineering from Purdue
University, West Lafayette, IN, USA, in 1996. From
1996 to 1998, he was an Assistant Professor with the
Department of Computer Science, Louisiana Tech
University, Ruston, LA, USA. From 1998 to 2001, he
was a Senior Component Design Engineer at Intel
Corporation, Hillsboro, OR, USA. In 2001, he joined
the School of Electrical Engineering and Computer
Science, Seoul National University, where he is
currently a Professor. He has been serving as an
Independent Director of Samsung Electronics since
March 2025, contributing to strategic guidance on
system semiconductors and advanced technology
innovation. Since June 2024, he has also been the
Director of the Inter-university Semiconductor
Research Center at SNU, leading national-level
collaboration in next-generation AI semiconductor
R&D.
His current research interests include
energy-efficient computer architectures, AI-centric
memory systems such as PIM and CXL-based
disaggregated memory, deep learning accelerators,
and heterogeneous SoC design for multimedia and
large AI model workloads. He has published over 300
papers and holds numerous patents in these areas. He
has led multiple major government and
industry-funded R&D programs and has been actively
engaged in semiconductor policy development and
strategic advisory roles in South Korea.
Speech Title: Semiconductor Innovations for AI: Toward a Memory-Centric Computing Paradigm
Abstract: The rapid advancement of Artificial
Intelligence (AI) has significantly increased
computational complexity and power consumption,
pushing traditional von Neumann architectures toward
fundamental limitations. Modern AI workloads,
particularly generative models, exhibit memory-bound
characteristics in which data movement between
processors and memory dominates latency and energy
usage. As semiconductor scaling slows near the 7-nm
technology node and chip development costs rise,
architectural innovation has become a key driver of
system performance improvement. This presentation
discusses the global competition in AI semiconductor
technologies that increasingly seek compute
sovereignty through in-house AI chip development. It
further highlights the critical role of memory
technology, as high-bandwidth data access emerges as
the primary performance bottleneck. Advanced memory
solutions such as High Bandwidth Memory (HBM),
Processing-in-Memory (PIM), and Compute Express Link
(CXL) are introduced as promising approaches to
overcome von Neumann bottlenecks. Recent
developments including HBM4 base-die compute
integration, DRAM-embedded PIM accelerators, and
CXL-based memory expansion demonstrate the shift
toward a memory-centric computing paradigm. By
examining these technology trends and industry
dynamics, this work underscores the strategic
importance of AI-memory innovation and explores
opportunities to lead in the emerging era of
memory-driven AI compute.